RICE Hardware Surface Veto board
With FPGAs, a large number of processing blocks can be built for parallel operation. The RICE inputs come from dozens of antennas which may be triggered, not only by neutrinos but by snowmobiles, radio transmitters, thermal noise, and other sources. These "false positives" may have distinctive timing patterns when sensed by the antennas.
The HSV compares these patterns with dozens of reference patterns in nanoseconds -- sufficiently fast to allow the acquisition system to acquire the signal before it is lost.
The GUI presents an array of statistics, updated in real time, about the experiment. It is also the route to entry of parameters including the uploading of timing patterns.